Title: Algorithms for Post-Silicon Validation and Debug of Radio-Frequency, Analog, and Mixed-Signal Circuits and Systems
Dr. Chatterjee, Advisor
Dr. Hasler, Chair
The objective of the proposed research is to develop algorithms and tools to automate and assist in the debugging of large, mixed-signal electronic system designs. Cutting edge fabrication processes allow for the integration of a large quantity of highly diverse components onto a single die. Engineering decisions and design validation currently take place at one of two levels: detailed simulation of small portions of the system or coarse approximations of chip-level behavior of the system. Bugs present in fabricated systems are casting doubt on pre-silicon validation and design decisions. The proposed research will provide tools for debugging designs throughout the design phase -including early silicon- and yield information enabling better decision-making and more rapid discovery and elimination of design bugs.